CEA-Leti in the Chiplet’s race
Dr Séverine CHERAMY
CEA-LETI, MINATEC Campus
Univ. Grenoble Alpes
Séverine Chéramy holds an engineering degree having specialized in material science. She has spent over eight years at GEMALTO, a leading smart-card company developing technologies for secure solutions such as contactless smart cards & electronic passports.
In 2008, she joined CEA-Leti as 3D project leader, and then as 3D Integration laboratory manager. This group develops technology and integration for 3DIC, in strong relationship with 3D design, model and simulation teams.
Since January 2017, she’s responsible for 3DIC integration strategy and Business development. She is also director of the ITR (Institute of Technological research) 3D program.
The chiplet concept consists of disintegration of a large SoC in several sub-functions, then connected thanks to fine pitch technologies. The final component is s 3D-SoC. 1st identified application is High Performance Computing, but no doubt that other applications will benefit from the huge advantages given by 3D advanced technologies.
This disruptive concept requires some R&D from architecture, conception, Cad flow and silicium technologies.
The wide range of expertises required can be covered thanks to close collaboration. The 3D program of IRT Nanoelec offers such R&D frame. The objective of the talk is to provide final results on IntAct (Active Interposer concept) demonstrator”